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Languages, design methods, and tools for electronic system design : selected contributions from FDL 2017 / [edited by] Daniel Große, Sara Vinco, Hiren Patel

Contributor(s): Material type: TextTextSeries: Lecture notes in electrical engineering ; 530.Publisher: Cham : Springer, 2019Description: 1 online resourceContent type:
  • text
Media type:
  • computer
Carrier type:
  • online resource
ISBN:
  • 3030022153
  • 9783030022150
Subject(s): Genre/Form: DDC classification:
  • 621.3815 23
LOC classification:
  • TK7867
Online resources:
Contents:
1. Automatic Integration of HDL IPs in Simulinkusing FMI and S-Function Interfaces.- 2. Towards Early Validation of Firmware-Based Power Management using Virtual Prototypes: A Constrained Random Approach.- 3. Symbolic Simulation of Dataflow Synchronous Programs with Timers.- 4. Language and Hardware Acceleration Backend for Graph Processing.- 5. Fault Analysis in Analog Circuits through Language Manipulation and Abstraction.- 6. A Methodology for Automated Consistency Checking Between Different Power-Aware Descriptions.
Summary: This book brings together a selection of the best papers from the twentiethedition of the Forum on specification and Design Languages Conference (FDL), which took place on September 18-20, 2017, in Verona, Italy. FDL is a well-established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modeling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems. Covers modeling and verification methodologies targeting digital and analog systems; Addresses firmware development and validation; Targets both functional and non-functional properties; Includes descriptions of methods for reliable system design.
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Includes bibliographical references and index.

1. Automatic Integration of HDL IPs in Simulinkusing FMI and S-Function Interfaces.- 2. Towards Early Validation of Firmware-Based Power Management using Virtual Prototypes: A Constrained Random Approach.- 3. Symbolic Simulation of Dataflow Synchronous Programs with Timers.- 4. Language and Hardware Acceleration Backend for Graph Processing.- 5. Fault Analysis in Analog Circuits through Language Manipulation and Abstraction.- 6. A Methodology for Automated Consistency Checking Between Different Power-Aware Descriptions.

This book brings together a selection of the best papers from the twentiethedition of the Forum on specification and Design Languages Conference (FDL), which took place on September 18-20, 2017, in Verona, Italy. FDL is a well-established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modeling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems. Covers modeling and verification methodologies targeting digital and analog systems; Addresses firmware development and validation; Targets both functional and non-functional properties; Includes descriptions of methods for reliable system design.

Online resource; title from PDF title page (EBSCO, viewed December 27, 2018)

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